`timescale 1ns/100ps
`include "uvm_macros.svh"
`include "reset_if.svh"
package reset_pkg::*;
    typedef enum {HIGH, LOW}   agr_reset_active_e;
    typedef enum {SYNC, ASYNC}   agr_reset_sync_e;
    typedef enum {POSEDGE, NEGEDGE}   agr_reset_edge_e;
    typedef enum {ASSERT, DEASSERT, RST_ONCE, UNKNOWN}   reset_type_e;
    typedef virtual reset_if      rst_vif;

    `include "reset_cfg.svh"
    `include "reset_req_seq_item.svh"
    `include "reset_rsp_seq_item.svh"
    `include "reset_driver.svh"
    `include "reset_monitor.svh"
    `include "reset_sequencer.svh"
    `include "reset_agent.svh"
    `include "reset_sequence.svh"
endpackage 